1. Field of the Invention
The present invention relates generally to the field of wireless communications, particularly, to an improved circuitry configuration and method for power calibration in a Time Division Multiple Access (TDMA) or Time Division Duplex (TDD) system, and, more particularly, to an improved circuitry configuration for performing radio frequency power measurement calibrations in TDMA, TDD and other systems and methods using the same.
2. Background and Objects of the Present Invention
The evolution of wireless communication over the past century, since Guglielmo Marconi's 1897 demonstration of radio's ability to provide continuous contact with ships sailing the English Channel, has been remarkable. Since Marconi's discovery, new wireline and wireless communication methods, services and standards have been adopted by people throughout the world. This evolution has been accelerating, particularly over the last ten years, during which the mobile radio communications industry has grown by orders of magnitude, fueled by numerous technological advances that have made portable radio equipment smaller, cheaper and more reliable. The exponential growth of mobile telephony will continue to rise in the coming decades as well, as this wireless network interacts with and eventually overtakes the existing wireline networks.
A growing number of wireless communications systems use Time Division Multiple Access (TDMA), in which multiple users share frequency spectrum by transmitting and receiving bursts of information only during each user's specific timeslot, as assigned by the system. These transceivers can simultaneously receive and transmit without difficulty, since the receive and transmit frequency bands are separated sufficiently. Time Division Duplex (TDD) takes TDMA one step further in that a particular timeslot structure is broken down further into uplink-only and downlink-only timeslots, i.e., a transceiver is only performing one task or the other at a particular time.
It is, in general, advantageous for any communications link to utilize as strong a signal as costs allow to both improve signal quality, i.e., achieve a higher signal-to-noise ratio, and to provide sufficient coverage or range (distance). However in most situations, limits are imposed by authorities, i.e., the Federal Communications Commission, upon the transmitted RF power of such systems in order to prevent one or more powerful signals from interfering with other users of the RF spectrum. Additional restrictions may be self-imposed by a system in order to minimize interference amongst its own subscribers.
Accordingly, it can be important to control an RF transmitter's output power level as tightly as possible towards a maximum limit without exceeding it.
A preferred way to maintain the aforementioned output power level window is through use of Automatic Level Control circuitry (ALC), in which the transmitter's output power level is monitored and feedback techniques are used to generate a control signal to adjust the output power to the prescribed level. One such ALC is described in U.S. Pat. No. 4,523,155 to Walczak et al. Another is described in a book entitled Analog Automatic Control Loops in Radar and EW by Richard Smith Hughes (Artech House, 1988). A great difficulty in these approaches, however, one which the present invention seeks to solve, is obtaining an accurate measure of the RF output power level over varying environmental conditions, especially temperature, as will be described hereinafter.
With reference now to FIG. 1 there is shown a conventional ALC, such as used in the aforementioned Hughes text, where a modulated RF signal is amplified by an amplifier 10. The amplified output then passes through an RF coupler 12, an RF isolator 14 and a filter 16 to an antenna 18 for transmission in a conventional manner.
A portion of the amplified output signal, however, is diverted via coupler 12 and connected through a capacitor 20 to a (biased) detector diode 22, which along with a second capacitor 24 forms a conventional envelope detector. The diverted, detected output is then passed (through a resistor 26) to the plus input of an amplifier 28.
In an effort to increase detection sensitivity, the detector diode 22 is often biased with a small amount of current, such as from a DC source 30 across a resistor 32, to increase the sensitivity of the detection circuitry by lowering the dynamic resistance of the diode 22. This bias current, however, creates a forward voltage (Vf.sub.DC) across the diode junction, which is significantly temperature dependent. The resulting voltage at the output of diode 22 is then a function of Vf.sub.DC +V.sub.RF, i.e., the sum of the DC forward voltage and the signal voltage (V.sub.RF). As noted, one serious problem affecting performance of this circuitry is the temperature dependance of the diode 22 voltage, which being approximately 2 mV/.degree.C. could constitute a significant portion of the above sum. Accordingly, some means to compensate for this effect is usually necessary to improve system performance.
A previously-used and common solution to the aforementioned temperature variation problem is to similarly bias a second or compensating diode 34, also illustrated in FIG. 1, and apply the voltage from this compensating diode 34 to the opposite terminal of a conventional difference amplifier, such as the aforementioned amplifier 28. In this manner, the variation in the DC voltage across the detector diode 22 is substantially negated by similar variations in the compensating diode 34. The gain of the compensating half of the circuit is then determined by the combination of resistive division supplied by a pair of resistors 38 and 40 in conjunction with a feedback resistor 42, as is the gain to the detected signal determined by the same feedback resistor 42 in combination with the resistive divider formed by resistors 26 and 27.
It has been generally thought, e.g., in U.S. Pat. No. 4,523,155 and in the Hughes text, that by use of this compensating diode 34 the deleterious effects of temperature variation may be eliminated. However, although this approach may ameliorate some of the temperature variation problems, it is not a panacea, and variations problems remain, e.g., due to diode-to-diode variation and imperfections in the semiconductor manufacturing process, such as differences in diode junction areas, contact potentials, geometries, emission coefficients, etc. There are also differences caused by variable environmental factors due, for example, to temperature, humidity, component aging and power supply voltage fluctuations which add to the degradation in performance. Thus, a new approach is needed to solve the aforedescribed temperature and other variance difficulties of the prior art calibration circuitry.
Additionally, alternative efforts to better control the aforementioned temperature variation problems and diode-to-diode variations involve stringent component requirements on greater numbers of components used, e.g., in controlling the diode bias current, which can prohibitively drive up overall system costs.
Accordingly, in view of the aforementioned discussion, it is an object of the present invention to provide a simpler solution to the problems of temperature and diode variations, while maintaining the output power levels at or near the maximum allowed level without exceeding, for example, an FCC limit.
It is a further object of the present invention that the aforementioned simpler solution lessen the stringent requirements on diode and other component specifications, as well as reduce the number of discrete components, thereby further reducing costs.